? semiconductor components industries, llc, 2002 may, 2002 rev. 6 1 publication order number: mc74ac00/d mc74ac00, mc74act00 quad 2-input nand gate highperformance silicongate cmos ? output drive capability: 24 ma ? operating voltage range: 2 to 6 v ac00; 4.5 to 5.5 act00 ? low input current: 1 a ? high noise immunity characteristic of cmos devices ? in compliance with the jedec standard no. 7a requirements ? chip complexity: 32 fets 3 y1 1 a1 pin 14 = v cc pin 7 = gnd figure 1. logic diagram 2 b1 6 y2 4 a2 5 b2 8 y3 9 a3 10 b3 11 y4 12 a4 13 b4 y = ab figure 2. pinout: 14lead packages (top view) 13 14 12 11 10 9 8 2 1 34567 v cc b4 a4 y4 b3 a3 y3 a1 b1 y1 a2 b2 y2 gnd l l h h l h l h function table inputs output ab h h h l y marking diagrams a = assembly location wl or l = wafer lot yy or y = year ww or w = work week tssop14 dt suffix case 948g xxx 00 alyw 1 14 1 14 pdip14 n suffix case 646 mc74xxx00n awlyyww soic14 d suffix case 751a 1 14 xxx00 awlyww http://onsemi.com eiaj14 m suffix case 965 1 14 74xxx00 awlyww 1 14 1 14 1 14 1 14 see detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. ordering information
mc74ac00, mc74act00 http://onsemi.com 2 maximum ratings (note 1) symbol parameter value unit v cc dc supply voltage 0.5 to 7.0 v v i dc input voltage 0.5 v i v cc 0.5 v v o dc output voltage (note 2) 0.5 v o v cc 0.5 v i ik dc input diode current 20 ma i ok dc output diode current 50 ma i o dc output sink/source current 50 ma i cc dc supply current per output pin 50 ma i gnd dc ground current per output pin 50 ma t stg storage temperature range 65 to 150 c t l lead temperature, 1 mm from case for 10 seconds 260 c t j junction temperature under bias 150 c ja thermal resistance pdip soic tssop 78 125 170 c/w p d power dissipation in still air at 85 c pdip soic tssop 78 125 170 mw msl moisture sensitivity level 1 f r flammability rating oxygen index: 30% 35% ul 94 v0 @ 0.125 in v esd esd withstand voltage human body model (note 3) machine model (note 4) charged device model (note 5) > 2000 > 200 > 1000 v i latchup latchup performance above v cc and below gnd at 85 c (note 6) 100 ma 1. absolute maximum continuous ratings are those values beyond which damage to the device may occur. extended exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. functional operation under absolute maximumrated conditions is not implied. 2. i o absolute maximum rating must be observed. 3. tested to eia/jesd22a114a. 4. tested to eia/jesd22a115a. 5. tested to jesd22c101a. 6. tested to eia/jesd78. recommended operating conditions symbol parameter min typ max unit v cc supply voltage mc74ac00 mc74act00 2.0 4.5 5.0 5.0 6.0 5.5 v v in , v out dc input voltage, output voltage (ref. to gnd) 0 v cc v t r , t f input rise and fall time (note 7) v cc @ 3.0 v mc74ac00 v cc @ 4.5 v v cc @ 5.5 v 150 40 25 ns/v t r , t f input rise and fall time (note 8) v cc @ 4.5 v mc74act00 v cc @ 5.5 v 10 8.0 ns/v t j junction temperature 150 c t a operating ambient temperature range 55 25 125 c i oh output current high 24 ma i ol output current low 24 ma 7. v in from 30% to 70% v cc . 8. v in from 0.8 v to 2.0 v.
mc74ac00, mc74act00 http://onsemi.com 3 dc characteristics mc74ac00 v cc t a = +25 c t a = 40 c to +85 c t a = 55 c + 125 c symbol parameter v cc (v) typ guaranteed limits unit conditions v ih minimum high level input voltage 3.0 4.5 5.5 1.5 2.25 2.75 2.1 3.15 3.85 2.1 3.15 3.85 2.1 3.15 3.85 v v out = 0.1 v or v cc 0.1 v v il maximum low level input voltage 3.0 4.5 5.5 1.5 2.25 2.75 0.9 1.35 1.65 0.9 1.35 1.65 0.9 1.35 1.65 v v out = 0.1 v or v cc 0.1 v v oh minimum high level output voltage 3.0 4.5 5.5 2.99 4.49 5.49 2.9 4.4 5.4 2.9 4.4 5.4 2.9 4.4 5.4 v i out = 50 a 3.0 4.5 5.5 2.56 3.86 4.86 2.46 3.76 4.76 2.4 3.7 4.7 v *v in = v il or v ih 12 ma i oh 24 ma 24 ma v ol maximum low level output voltage 3.0 4.5 5.5 0.002 0.001 0.001 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 v i out = 50 a 3.0 4.5 5.5 0.36 0.36 0.36 0.44 0.44 0.44 0.5 0.5 0.5 v *v in = v il or v ih 12 ma i ol 24 ma 24 ma i in maximum input leakage current 5.5 0. 1 1.0 1.0 a v i = v cc , gnd i old 2minimum dynamic out p ut current 5.5 75 50 ma v old = 1.65 v max i ohd output current 5.5 75 50 ma v ohd = 3.85 v min i cc maximum quiescent supply current 5.5 4.0 40 40 a v in = v cc or gnd *all outputs loaded; thresholds on input associated with output under test. 2maximum test duration 2.0 ms, one output loaded at a time. note: i in and i cc @ 3.0 v are guaranteed to be less than or equal to the respective limit @ 5.5 v v cc . ac characteristics (t r = t f = 3.0 ns; c l = 50 pf; see figures 3 and 4 for waveforms) mc74ac00 v cc * t a = +25 c t a = 40 c to +85 c t a = 55 c to + 125 c symbol parameter v cc * (v) min typ max min max min max unit t plh propagation delay 3.3 5.0 2.0 1.5 7.0 6.0 9.5 8.0 2.0 1.5 10.0 8.5 1.0 1.0 11.0 8.5 ns t phl propagation delay 3.3 5.0 1.5 1.5 5.5 4.5 8.0 6.5 1.0 1.0 8.5 7.0 1.0 1.0 9.0 7.0 ns *voltage range 3.3 v is 3.3 v 0.3 v. voltage range 5.0 v is 5.0 v 0.5 v.
mc74ac00, mc74act00 http://onsemi.com 4 dc characteristics mc74act00 v cc t a = +25 c t a = 40 c to +85 c t a = 55 c to + 125 c symbol parameter v cc (v) typ guaranteed limits unit conditions v ih minimum high level input voltage 4.5 5.5 1.5 1.5 2.0 2.0 2.0 2.0 2.0 2.0 v v out = 0.1 v or v cc 0.1 v v il maximum low level input voltage 4.5 5.5 1.5 1.5 0.8 0.8 0.8 0.8 0.8 0.8 v v out = 0.1 v or v cc 0.1 v v oh minimum high level output voltage 4.5 5.5 4.49 5.49 4.4 5.4 4.4 5.4 4.4 5.4 v i out = 50 a 4.5 5.5 3.86 4.86 3.76 4.76 3.7 4.7 v *v in = v il or v ih i oh 24 ma 24 ma v ol maximum low level output voltage 4.5 5.5 0.001 0.001 0.1 0.1 0.1 0.1 0.1 0.1 v i out = 50 a 4.5 5.5 0.36 0.36 0.44 0.44 0.5 0.5 v *v in = v il or v ih i ol 24 ma 24 ma i in maximum input leakage current 5.5 0.1 1.0 1.0 a v i = v cc , gnd i cct additional max. i cc /input 5.5 0.6 1.5 1.6 ma v i = v cc 2.1 v i old 2minimum dynamic out p ut current 5.5 75 50 ma v old = 1.65 v max i ohd output current 5.5 75 50 ma v ohd = 3.85 v min i cc maximum quiescent supply current 5.5 4.0 40 40 a v in = v cc or gnd *all outputs loaded; thresholds on input associated with output under test. 2maximum test duration 2.0 ms, one output loaded at a time. ac characteristics (t r = t f = 3.0 ns; c l = 50 pf; see figures 3 and 4 for waveforms) mc74act00 v cc * t a = +25 c t a = 40 c to +85 c t a = 55 c to +125 c symbol parameter v cc * (v) min typ max min max min max unit t plh propagation delay 5.0 1.5 5.5 9.0 1.0 9.5 1.0 9.5 ns t phl propagation delay 5.0 1.5 4.0 7.0 1.0 8.0 1.0 8.0 ns *voltage range 5.0 v is 5.0 v 0.5 v. capacitance symbol parameter value typ test conditions unit c in input capacitance 4.5 v cc = 5.0 v pf c pd power dissipation capacitance 30 v cc = 5.0 v pf
mc74ac00, mc74act00 http://onsemi.com 5 figure 3. switching waveforms gnd v cc output y input a or b c l * *includes all probe and jig capacitance 50% device under test output figure 4. test circuit 90% v mi 10% t plh t phl t f t r 50 scope test point 450 input v mi = 50% for mc74ac00 = 1.5 v for mc74act00 order information device package shipping mc74ac00n pdip14 2000/box mc74act00n pdip14 2000/box mc74ac00dr2 soic14 2500/reel mc74act00dr2 soic14 2500/reel mc74ac00dtr2 tssop14 2500/reel mc74act00dtr2 tssop14 2500/reel mc74ac00mel eiaj14 2000 tape and reel mc74act00mel eiaj14 2000 tape and reel
mc74ac00, mc74act00 http://onsemi.com 6 package dimensions pdip14 n suffix case 64606 issue m soic14 d suffix case 751a03 issue f notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. a b g p 7 pl 14 8 7 1 m 0.25 (0.010) b m s b m 0.25 (0.010) a s t t f r x 45 seating plane d 14 pl k c j m dim min max min max inches millimeters a 8.55 8.75 0.337 0.344 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.228 0.244 r 0.25 0.50 0.010 0.019 17 14 8 b a dim min max min max millimeters inches a 0.715 0.770 18.16 18.80 b 0.240 0.260 6.10 6.60 c 0.145 0.185 3.69 4.69 d 0.015 0.021 0.38 0.53 f 0.040 0.070 1.02 1.78 g 0.100 bsc 2.54 bsc h 0.052 0.095 1.32 2.41 j 0.008 0.015 0.20 0.38 k 0.115 0.135 2.92 3.43 l m --- 10 --- 10 n 0.015 0.039 0.38 1.01 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. f hg d k c seating plane n t 14 pl m 0.13 (0.005) l m j 0.290 0.310 7.37 7.87
mc74ac00, mc74act00 http://onsemi.com 7 package dimensions tssop14 dt suffix case 948g01 issue o dim min max min max inches millimeters a 4.90 5.10 0.193 0.200 b 4.30 4.50 0.169 0.177 c --- 1.20 --- 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.50 0.60 0.020 0.024 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane -w-. s u 0.15 (0.006) t 2x l/2 s u m 0.10 (0.004) v s t l u seating plane 0.10 (0.004) t ?? ?? section nn detail e j j1 k k1 detail e f m w 0.25 (0.010) 8 14 7 1 pin 1 ident. h g a d c b s u 0.15 (0.006) t v 14x ref k n n h e a 1 dim min max min max inches --- 2.05 --- 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.18 0.27 0.007 0.011 9.90 10.50 0.390 0.413 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 --- 1.42 --- 0.056 a 1 h e q 1 l e 10 0 10 l e q 1 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). 0.13 (0.005) m 0.10 (0.004) d z e 1 14 8 7 e a b view p c l detail p m a b c d e e 0.50 m z soeiaj14 m suffix case 96501 issue o
mc74ac00, mc74act00 http://onsemi.com 8 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indem nify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and re asonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized u se, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employ er. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc74ac00/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada
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